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7th International Symposium on Quality Electronic Design (ISQED'06)
Enabling Quality and Schedule Predictability in SoC Design using HandoffQC
San Jose, California
March 27-March 29
ISBN: 0-7695-2523-7
Bhaskar J. Karmakar, DSP Systems, Texas Instruments, Bangalore, India.
V. Kalyana Chakravarty, DSP Systems, Texas Instruments, Bangalore, India.
R. Venkatraman, DSP Systems, Texas Instruments, Bangalore, India.
Jagdish C. Rao, DSP Systems, Texas Instruments, Bangalore, India.
Design of state-of-the-art SoCs often require multiple design data handoffs between sub-teams involved in its development. Handoff quality issues account for a significant portion of the wasted effort during SoC development?principally due to completeness, correctness and consistency of different elements of the handoff. Such issues impact silicon quality and schedule predictability, due to the re-work effort involved. HandoffQC has been developed as an integrated QC system to qualify incoming handoffs, which ensures handoff and silicon issues are detected and fixed upfront. HandoffQC also allows for applying learnings from one design to the next, promoting continuous process improvement. The system has been architected to be easily extensible in terms of the quality checks, is user configurable and can easily be integrated into design flows. HandoffQC has been deployed on many production designs where it has successfully identified several handoff and potential silicon issues before they resulted in downstream design re-work.
Citation:
Bhaskar J. Karmakar, V. Kalyana Chakravarty, R. Venkatraman, Jagdish C. Rao, "Enabling Quality and Schedule Predictability in SoC Design using HandoffQC," isqed, pp.769-774, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006
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