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Sixth International Symposium on Quality of Electronic Design (ISQED'05)
Noise Library Characterization for Large Capacity Static Noise Analysis Tools
San Jose, California
March 21-March 23
ISBN: 0-7695-2301-3
ASCII Text
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Alex Gyure, Alireza Kasnavi, Sam Lo, Peivand F. Tehrani, William Shu, Mahmoud Shahram, Joddy W. Wang, Jindrich Zedja, "Noise Library Characterization for Large Capacity Static Noise Analysis Tools," Quality Electronic Design, International Symposium on, pp. 28-34, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005.
 
 
BibTex
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@article{ 10.1109/ISQED.2005.85,
author = {Alex Gyure and Alireza Kasnavi and Sam Lo and Peivand F. Tehrani and William Shu and Mahmoud Shahram and Joddy W. Wang and Jindrich Zedja},
title = {Noise Library Characterization for Large Capacity Static Noise Analysis Tools},
journal ={Quality Electronic Design, International Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2301-3},
pages = {28-34},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.85},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Quality Electronic Design, International Symposium on
TI - Noise Library Characterization for Large Capacity Static Noise Analysis Tools
SN - 0-7695-2301-3
SP28
EP34
A1 - Alex Gyure,
A1 - Alireza Kasnavi,
A1 - Sam Lo,
A1 - Peivand F. Tehrani,
A1 - William Shu,
A1 - Mahmoud Shahram,
A1 - Joddy W. Wang,
A1 - Jindrich Zedja,
PY - 2005
KW - null
VL - 0
JA - Quality Electronic Design, International Symposium on
ER -
 
Alex Gyure, Synopsys, Inc., Mountain View, CA
Alireza Kasnavi, Synopsys, Inc., Mountain View, CA
Sam Lo, Synopsys, Inc., Mountain View, CA
Peivand F. Tehrani, Synopsys, Inc., Mountain View, CA
William Shu, Synopsys, Inc., Mountain View, CA
Mahmoud Shahram, Synopsys, Inc., Mountain View, CA
Joddy W. Wang, Synopsys, Inc., Mountain View, CA
Jindrich Zedja, Synopsys, Inc., Mountain View, CA
Noise glitches can cause timing degradation in switching nodes or incorrect transitions in steady-state or "quiet" nodes. These incorrect transitions can propagate through the circuit, and can create functional errors or failures. This paper presents both a method and a practical implementation technique for accurately and efficiently characterizing and modeling the propagation of noise glitches through a cell within an integrated circuit. A characterization methodology is developed to generate Noise Immunity Criteria (NIC) and Noise Propagation Tables (NPT) for a given cell library. The resulting look-up tables are appended to any standard gate-level library to be utilized by Static Timing and Noise Analysis (STNA) tools.
Citation:
Alex Gyure, Alireza Kasnavi, Sam Lo, Peivand F. Tehrani, William Shu, Mahmoud Shahram, Joddy W. Wang, Jindrich Zedja, "Noise Library Characterization for Large Capacity Static Noise Analysis Tools," isqed, pp.28-34, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005
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