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Sixth International Symposium on Quality of Electronic Design (ISQED'05)
Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization
San Jose, California
March 21-March 23
ISBN: 0-7695-2301-3
ASCII Text
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Paul Friedberg, Yu Cao, Jason Cain, Ruth Wang, Jan Rabaey, Costas Spanos, "Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization," Quality Electronic Design, International Symposium on, pp. 516-521, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005.
 
 
BibTex
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@article{ 10.1109/ISQED.2005.82,
author = {Paul Friedberg and Yu Cao and Jason Cain and Ruth Wang and Jan Rabaey and Costas Spanos},
title = {Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization},
journal ={Quality Electronic Design, International Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2301-3},
pages = {516-521},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.82},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Quality Electronic Design, International Symposium on
TI - Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization
SN - 0-7695-2301-3
SP516
EP521
A1 - Paul Friedberg,
A1 - Yu Cao,
A1 - Jason Cain,
A1 - Ruth Wang,
A1 - Jan Rabaey,
A1 - Costas Spanos,
PY - 2005
KW - null
VL - 0
JA - Quality Electronic Design, International Symposium on
ER -
 
Paul Friedberg, University of California, Berkeley, CA
Yu Cao, University of California, Berkeley, CA
Jason Cain, University of California, Berkeley, CA
Ruth Wang, University of California, Berkeley, CA
Jan Rabaey, University of California, Berkeley, CA
Costas Spanos, University of California, Berkeley, CA
Within-die spatial correlation of device parameter values caused by manufacturing variations [1] has a significant impact on circuit performance. Based on experimental and simulation results, we (1) characterize the spatial correlation of gate length over a full-field range of horizontal and vertical separation; (2) develop a rudimentary spatial correlation model; and (3) investigate its impact on the variability of circuit performance.
Citation:
Paul Friedberg, Yu Cao, Jason Cain, Ruth Wang, Jan Rabaey, Costas Spanos, "Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization," isqed, pp.516-521, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005
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