A Technique for Designing Totally Self-Checking Domino Logic Circuits

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by C. K. Tang Articles by P. K. Lala Articles by J. P. Parkerson

Sixth International Symposium on Quality of Electronic Design (ISQED'05)

San Jose, California

March 21-March 23

ISBN: 0-7695-2301-3

	ASCII Text	x
	C. K. Tang, P. K. Lala, J. P. Parkerson, "A Technique for Designing Totally Self-Checking Domino Logic Circuits," Quality Electronic Design, International Symposium on, pp. 128-132, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005.

	BibTex	x
	@article{ 10.1109/ISQED.2005.14, author = {C. K. Tang and P. K. Lala and J. P. Parkerson}, title = {A Technique for Designing Totally Self-Checking Domino Logic Circuits}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2005}, isbn = {0-7695-2301-3}, pages = {128-132}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.14}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Quality Electronic Design, International Symposium on TI - A Technique for Designing Totally Self-Checking Domino Logic Circuits SN - 0-7695-2301-3 SP128 EP132 A1 - C. K. Tang, A1 - P. K. Lala, A1 - J. P. Parkerson, PY - 2005 KW - null VL - 0 JA - Quality Electronic Design, International Symposium on ER -

C. K. Tang, University of Arkansas, Fayetteville, AR

P. K. Lala, University of Arkansas, Fayetteville, AR

J. P. Parkerson, University of Arkansas, Fayetteville, AR

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.14

A scheme for concurrent self-checking domino logic circuit is proposed. The self-checking feature is achieved by transistor sharing of the original and its inverse functions and by using the outputs as 1-out-of-2 code. The sharing of transistors lowers the overhead required for the inverse function. A checker circuit is embedded into the self-checking implementation. The scheme is especially suitable for large CMOS domino logic circuits.

Citation:

C. K. Tang, P. K. Lala, J. P. Parkerson, "A Technique for Designing Totally Self-Checking Domino Logic Circuits," isqed, pp.128-132, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.