Increasing package design complexity and performance requirements, shorter time to market demands, and cost reduction targets require efficient tool suites and standardized design processes. There is a need to integrate design tools, environments and processes to provide a true concurrent design methodology between IC, Package and Board. This paper focuses specifically on the necessary evil "Packaging" area. It describes how Intel?s packaging tools evolved through the years and outlines the future challenges that need to be addressed to make the overall process as seamless as possible.