A software system has been written that analyzes a mask layout and searches for locations sensitive to residual processing effects. Pattern matching is used to determine where the layout geometry most closely resembles a problematic shape. The system was designed to quickly provide feedback to the designer as to which areas in the mask must be altered. The goal is to find and rank order the locations of the worst-case effects in a full chip layout within an hour. A number of different algorithms have been developed based on converting the layout from polygons to a bitmap, edges, or rectangles and triangles. Higher-order primitives such as rectangles require that the pattern be pre-integrated in one or two dimensions. Results employing the rectangle and triangle algorithm show that all edges on a mask layer of several square centimeters can be processed in less than an hour.