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Fourth International Symposium on Quality Electronic Design
Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic
San Jose, California
March 24-March 26
ISBN: 0-7695-1881-8
Geun Rae Cho, Colorado State University
Tom Chen, Colorado State University
We present a silicon-on-insulator (SOI) pass-transistor logic (PTL) gate with an active body bias control circuit and compare the proposed PTL gate with other types of PTL gates with different body bias circuits in two different 0:13?m SOI CMOS technologies. The experimental results show that the proposed SOI PTL gate using the body bias controlled technique is superior in terms of performance and power consumption than other DTMOS PTL gates.
Citation:
Geun Rae Cho, Tom Chen, "Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic," isqed, pp.55, Fourth International Symposium on Quality Electronic Design, 2003
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