First International Symposium on Quality of Electronic Design
Deep Sub-Micron Static Timing Analysis in Presence of Crosstalk
San Jose, California
March 20-March 22
ISBN: 0-7695-0525-2
A complete and accurate method for static timing analysis of deep sub-micron devices in presence of crosstalk is introduced. This scheme provides an efficient platform for fast and accurate static timing verification of large scale transistor and cell level netlists, with coupled interconnects and high switching speeds. This paper presents the solution to the crosstalk problem implemented in the static timing tool PathMill as its crosstalk extension (CTX). A comparison of simulation results between this approach and SPICE is also provided.
Index Terms:
Crosstalk, VLSI, simulation, transistor, static, timing, DSM
Citation:
Peivand F. Tehrani, Shang Woo Chyou, Uma Ekambaram, "Deep Sub-Micron Static Timing Analysis in Presence of Crosstalk," isqed, pp.505, First International Symposium on Quality of Electronic Design, 2000