2007 IEEE International Symposium on Performance Analysis of Systems&Software
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
San Jose, CA
April 25-April 27
ISBN: 1-4244-1081-9
This paper proposes a specialized memory structure called CA-RAM (content addressable random access memory) to accelerate search operations present in many important real-world applications. Search operations can occupy a significant portion of total execution time and energy consumption, while posing a difficult performance problem to tackle using traditional memory hierarchy concepts. In essence, CA-RAM is a direct hardware implementation of the well-known hashing technique. Searchable records are stored in CA-RAM at a location determined by a hash function, defined on their search key. After a database has been built, looking up a record in CA-RAM typically involves a single memory access followed by a parallel key matching operation. Compared with a conventional CAM (content addressable memory) solution, CA-RAM capitalizes on dense SRAM and DRAM designs, and achieves comparable search performance while occupying much smaller area and consuming significantly less power. This paper presents detailed design aspects of CA-RAM, to be integrated in future general-purpose and application-specific processors and systems. To further motivate and justify our approach, we present two real examples of using CA-RAM to build a high-performance search accelerator targeting: IP address lookup in core routers and trigram lookup in a large speech recognition system
Index Terms:
high-performance search accelerator, high-performance memory substrate, search-intensive application, memory structure, content addressable random access memory, search operation, memory hierarchy concept, direct hardware implementation, hashing technique, hash function, memory access, parallel key matching operation, application-specific processor
Citation:
null Sangyeun Cho, J.R. Martin, null Ruibin Xu, M.H. Hammoud, R. Melhem, "CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications," ispass, pp.230-241, 2007 IEEE International Symposium on Performance Analysis of Systems&Software, 2007
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