Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache

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	Similar Articles Articles by Raimund Kirner Articles by Peter Puschner

10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'07)

Santorini Island, Greece

May 07-May 09

ISBN: 0-7695-2765-5

	ASCII Text	x
	Raimund Kirner, Peter Puschner, "Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache," Object-Oriented Real-Time Distributed Computing, IEEE International Symposium on, pp. 87-93, 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'07), 2007.

	BibTex	x
	@article{ 10.1109/ISORC.2007.56, author = {Raimund Kirner and Peter Puschner}, title = {Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache}, journal ={Object-Oriented Real-Time Distributed Computing, IEEE International Symposium on}, volume = {0}, year = {2007}, isbn = {0-7695-2765-5}, pages = {87-93}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISORC.2007.56}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Object-Oriented Real-Time Distributed Computing, IEEE International Symposium on TI - Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache SN - 0-7695-2765-5 SP87 EP93 A1 - Raimund Kirner, A1 - Peter Puschner, PY - 2007 KW - null VL - 0 JA - Object-Oriented Real-Time Distributed Computing, IEEE International Symposium on ER -

Raimund Kirner, Technische Universitat Wien, Austria

Peter Puschner, Technische Universitat Wien, Austria

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISORC.2007.56

Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded software is generally increasing, it becomes more and more complex to verify the correct temporal behavior of software, running on this high-end embedded computer systems.

To achieve time-predictability the authors introduced a very rigid software execution model with distribution being realized based on the time-triggered communication model. In this paper we analyze the time-predictability of a preempting task-activation, running on a hardware with direct-mapped instruction caches. As one result we analyze why a task-preemption driven by a clock interrupt is not suitable to guarantee time-predictability. As a second result, we present a timepredictable task-preemption driven by an instruction counter.

Citation:

Raimund Kirner, Peter Puschner, "Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache," isorc, pp.87-93, 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'07), 2007

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