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38th International Symposium on Multiple Valued Logic (ismvl 2008)
Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices
May 22-May 24
ISBN: 978-0-7695-3155-7
ASCII Text
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Akihiro Hirosaki, Masatomo Miura, Atsushi Matsumoto, Takahiro Hanyu, "Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices," Multiple-Valued Logic, IEEE International Symposium on, pp. 14-19, 38th International Symposium on Multiple Valued Logic (ismvl 2008), 2008.
 
 
BibTex
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@article{ 10.1109/ISMVL.2008.13,
author = {Akihiro Hirosaki and Masatomo Miura and Atsushi Matsumoto and Takahiro Hanyu},
title = {Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices},
journal ={Multiple-Valued Logic, IEEE International Symposium on},
volume = {0},
year = {2008},
issn = {0195-623X},
pages = {14-19},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.2008.13},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Multiple-Valued Logic, IEEE International Symposium on
TI - Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices
SN - 0195-623X
SP14
EP19
A1 - Akihiro Hirosaki,
A1 - Masatomo Miura,
A1 - Atsushi Matsumoto,
A1 - Takahiro Hanyu,
PY - 2008
KW - reliability
KW - differential-pair circuit
KW - radix-2 signed-digit adder
VL - 0
JA - Multiple-Valued Logic, IEEE International Symposium on
ER -
 
A compensation method against a threshold-voltage (Vth) variation using tunneling magnetoresistive (TMR) devices, is proposed for a deep-submicron VLSI. The influence of the Vth variation in a single MOS transistor can be neglected by adjusting the source voltage of the MOS transistor. The desired circuit behavior is obtained by programming the resistance value of a TMR device which is connected to the MOS transistor in series. By using HSPICE simulation under a 90nm CMOS technology, it is demonstrated that a radix-2 signed-digit adder using the proposed method is robust against the Vth variation.
Index Terms:
reliability, differential-pair circuit, radix-2 signed-digit adder
Citation:
Akihiro Hirosaki, Masatomo Miura, Atsushi Matsumoto, Takahiro Hanyu, "Vth-Variation Compensation of Multiple-Valued Current-Mode Circuit Using TMR Devices," ismvl, pp.14-19, 38th International Symposium on Multiple Valued Logic (ismvl 2008), 2008
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