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35th International Symposium on Multiple-Valued Logic (ISMVL'05)
Test Generation and Fault Localization for Quantum Circuits
University of Calgary, Canada
May 19-May 21
ISBN: 0-7695-2336-6
Marek Perkowski, Portland State University, Portland, OR
Jacob Biamonte, Portland State University, Portland, OR
Martin Lukac, Portland State University, Portland, OR
It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. "Probabilistic set covering" and "probabilistic adaptive trees" that generalize those known in standard circuits, are next used.
Citation:
Marek Perkowski, Jacob Biamonte, Martin Lukac, "Test Generation and Fault Localization for Quantum Circuits," ismvl, pp.62-68, 35th International Symposium on Multiple-Valued Logic (ISMVL'05), 2005
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