34th International Symposium on Multiple-Valued Logic (ISMVL'04) Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation University of Toronto, Toronto, Canada May 19-May 22 ISBN: 0-7695-2130-4
A design is proposed for a voltage-mode signed digit CMOS (SD-CMOS) logic circuit. Theis circuit can provide stable, static operation with a multi-voltage power supply, and it can be fabricated by applyingwith standard CMOS process technology. Key components based on the proposed circuit design, such as a driver circuit, an inverter circuit, a general CMOS logic circuit, and a D-F/F, are described. The Each circuit?s? element numbers, operation speeds, and power consumption are examined from the viewpoint of system applications.
Citation:
Hideki Fukuda, "Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation," ismvl, pp.128-134, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||