Advanced Circuit Technology to Realize Post Giga-bit DRAM

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The 28th International Symposium on Multiple-Valued Logic

Fukuoka, Japan

May 27-May 29

ISBN: 0-8186-8371-6

	ASCII Text	x
	T. Okuda, "Advanced Circuit Technology to Realize Post Giga-bit DRAM," Multiple-Valued Logic, IEEE International Symposium on, pp. 2, The 28th International Symposium on Multiple-Valued Logic, 1998.

	BibTex	x
	@article{ 10.1109/ISMVL.1998.679266, author = {T. Okuda}, title = {Advanced Circuit Technology to Realize Post Giga-bit DRAM}, journal ={Multiple-Valued Logic, IEEE International Symposium on}, volume = {0}, year = {1998}, issn = {0195-623X}, pages = {2}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.1998.679266}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Multiple-Valued Logic, IEEE International Symposium on TI - Advanced Circuit Technology to Realize Post Giga-bit DRAM SN - 0195-623X SP EP A1 - T. Okuda, PY - 1998 VL - 0 JA - Multiple-Valued Logic, IEEE International Symposium on ER -

Citation:

T. Okuda, "Advanced Circuit Technology to Realize Post Giga-bit DRAM," ismvl, pp.2, The 28th International Symposium on Multiple-Valued Logic, 1998

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