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2008 International Symposiums on Information Processing
FPGA Implementation of an Adaptive Noise Canceller
May 23-May 25
ISBN: 978-0-7695-3151-9
ASCII Text
x 
 
Tian Lan, Jinlin Zhang, "FPGA Implementation of an Adaptive Noise Canceller," International Symposiums on Information Processing, pp. 553-558, 2008 International Symposiums on Information Processing, 2008.
 
 
BibTex
x
 
@article{ 10.1109/ISIP.2008.107,
author = {Tian Lan and Jinlin Zhang},
title = {FPGA Implementation of an Adaptive Noise Canceller},
journal ={International Symposiums on Information Processing},
volume = {0},
year = {2008},
isbn = {978-0-7695-3151-9},
pages = {553-558},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISIP.2008.107},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - International Symposiums on Information Processing
TI - FPGA Implementation of an Adaptive Noise Canceller
SN - 978-0-7695-3151-9
SP553
EP558
A1 - Tian Lan,
A1 - Jinlin Zhang,
PY - 2008
KW - field programmable gate array (FPGA)
KW - least mean square (LMS) filtering
KW - hardware implementation
VL - 0
JA - International Symposiums on Information Processing
ER -
 
This paper proposes an FPGA implementation of an Adaptive Noise Canceller using the Least Mean Square (LMS) algorithm. The hardware architecture is synthesized using the Xilinx Spartan-3e Starter Kit as the target board. The experimental result of the hardware implementation shows the performance of LMS algorithm under different conditions and the feasibility of our architecture. A comparison between hardware and pure software implementation is then made with different filter taps.
Index Terms:
field programmable gate array (FPGA), least mean square (LMS) filtering, hardware implementation
Citation:
Tian Lan, Jinlin Zhang, "FPGA Implementation of an Adaptive Noise Canceller," isip, pp.553-558, 2008 International Symposiums on Information Processing, 2008
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