33rd International Symposium on Computer Architecture (ISCA'06) An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors Boston, Massachusetts June 17-June 21 ISBN: 0-7695-2608-X
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISCA.2006.8
This paper presents a high-availability system architecture called INDRA an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor (or CMP) with novel security and fault recovery mechanisms. INDRA represents the first effort to create remote attack immune, self-healing network services using the emerging multicore processors. By exploring the property of a tightly-coupled multicore system, INDRA pioneers several concepts. It creates a hardware insulation, establishes finegrained fault monitoring, exploits monitoring/backup concurrency, and facilitates fast recovery services with minimal performance impact. In addition, INDRA?s fault/exploit monitoring is implemented in software rather than in hardware logic, thereby providing better flexibility and upgradability. To provide efficient service recovery and thus improve service availability, we propose a novel delta state backup and recovery on-demand mechanism in INDRA that substantially outperforms conventional checkpointing schemes. We demonstrate and evaluate INDRA?s capability and performance using real network services and a cycle-level architecture simulator. As indicated by our performance results, INDRA is highly effective in establishing a more dependable system with high service availability using emerging multicore processors.
Citation:
Weidong Shi, Hsien-Hsin S. Lee, Laura `Falk, Mrinmoy Ghosh, "An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors," isca, pp.102-113, 33rd International Symposium on Computer Architecture (ISCA'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||