Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System

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13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing

San Juan, Puerto Rico

April 12-April 16

ISBN: 0-7695-0143-5

	ASCII Text	x
	Keqin Li, Victor Y. Pan, "Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System," Parallel Processing Symposium, International, pp. 31, 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, 1999.

	BibTex	x
	@article{ 10.1109/IPPS.1999.760431, author = {Keqin Li and Victor Y. Pan}, title = {Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System}, journal ={Parallel Processing Symposium, International}, volume = {0}, year = {1999}, issn = {1063-7133}, pages = {31}, doi = {http://doi.ieeecomputersociety.org/10.1109/IPPS.1999.760431}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Processing Symposium, International TI - Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System SN - 1063-7133 SP EP A1 - Keqin Li, A1 - Victor Y. Pan, PY - 1999 VL - 0 JA - Parallel Processing Symposium, International ER -

Keqin Li, State University of New York at New Paltz

Victor Y. Pan, City University of New York

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPPS.1999.760431

The known fast sequential algorithms for multiplying two N? N matrices (over an arbitrary ring) have time complexity 0(Na) where 2 < a < 3 The current best value of a is less than 2.3755. We show that for all 1 = p = Na, multiplying two N ? N matrices can be performed on a p-processor linear array with a reconfigurable pipelined bus system (LARPBS) in 0(Na / p + (N2/p2/a) log p) time. This is currently the fastest parallelization of the best known sequential matrix multiplication algorithm on a distributed memory parallel system.

Citation:

Keqin Li, Victor Y. Pan, "Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System," ipps, pp.31, 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, 1999

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