2009 IEEE International Symposium on Parallel&Distributed Processing Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture Rome, Italy May 23-May 29 ISBN: 978-1-4244-3751-1
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on existing simple cores (in-order pipelines, no branch predictors, no ROBs).
Citation:
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, "Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture," ipdps, pp.1-8, 2009 IEEE International Symposium on Parallel&Distributed Processing, 2009 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||