Proceedings 20th IEEE International Parallel & Distributed Processing Symposium Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors Rhodes Island, Greece April 25-April 29 ISBN: 1-4244-0054-6
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling, applied to this architecture, will attempt to balance the thread load across cores. This research demonstrates that such an approach eliminates one of the big advantages of this architecture - the ability to use unbalanced schedules to allocate the right amount of execution resources to each thread. However, accommodating unbalanced schedules creates several difficulties, the biggest being the fact that the search space of all schedules (both balanced and unbalanced) is much greater than that of the balanced schedules alone. This work proposes and evaluates scheduling policies that allow the system to identify and migrate toward good thread schedules, whether the best schedules are balanced or unbalanced.
Index Terms:
execution resources allocation, unbalanced thread scheduling, chip microprocessors, simultaneous multithreaded processors, multiprocessor scheduling
Citation:
M. De Vuyst, R. Kumar, D.M. Tullsen, "Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors," ipdps, pp.117, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium, 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||