19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip Denver, Colorado April 04-April 08 ISBN: 0-7695-2312-9
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.95
Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as energy-efficient. To find an energy-efficient solution for the communication network we analyze three wireless applications. Based on their communication requirements we observe that revisiting of the circuit switching techniques is beneficial. In this paper we propose a new energy-efficient reconfigurable circuit-switched Network-on-Chip. By physically separating the concurrent data streams we reduce the overall energy consumption. The circuit-switched router has been synthesized and analyzed for its power consumption in 0.13 ?m technology. A 5-port circuit-switched router has an area of 0.05 mm^2 and runs at 1075 MHz. The proposed architecture consumes 3.5 times less energy compared to its packet-switched equivalent.
Citation:
Pascal T. Wolkotte, Gerard J. M. Smit, Gerard K. Rauwerda, Lodewijk T. Smit, "An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip," ipdps, vol. 4, pp.155a, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||