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19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3
Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures
Denver, Colorado
April 04-April 08
ISBN: 0-7695-2312-9
ASCII Text
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F. Rivera, M. Sanchez-Elez, M. Fernandez, R. Hermida, N. Bagherzadeh, "Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures," Parallel and Distributed Processing Symposium, International, vol. 4, pp. 171b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, 2005.
 
 
BibTex
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@article{ 10.1109/IPDPS.2005.270,
author = {F. Rivera and M. Sanchez-Elez and M. Fernandez and R. Hermida and N. Bagherzadeh},
title = {Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures},
journal ={Parallel and Distributed Processing Symposium, International},
volume = {4},
year = {2005},
issn = {1530-2075},
pages = {171b},
doi = {http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.270},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel and Distributed Processing Symposium, International
TI - Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures
SN - 1530-2075
SP
EP
A1 - F. Rivera,
A1 - M. Sanchez-Elez,
A1 - M. Fernandez,
A1 - R. Hermida,
A1 - N. Bagherzadeh,
PY - 2005
KW - null
VL - 4
JA - Parallel and Distributed Processing Symposium, International
ER -
 
F. Rivera, Universidad Complutense, Spain
M. Sanchez-Elez, Universidad Complutense, Spain
M. Fernandez, Universidad Complutense, Spain
R. Hermida, Universidad Complutense, Spain
N. Bagherzadeh, University of California, Irvine
In this paper we present a data prefetch policy for the execution of 3D interactive applications on coarse-grain reconfigurable architectures. User's actions not occurring at expected times combined with the volume of data involved in this kind of applications impact strongly in performance. We define a data prefetch scheme to avoid reconfigurable processing unit stalls due to operands unavailability through profiling methodologies and special search algorithms. Experimental results satisfy time constraints of interactive applications and show a power effective solution for them.
Citation:
F. Rivera, M. Sanchez-Elez, M. Fernandez, R. Hermida, N. Bagherzadeh, "Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures," ipdps, vol. 4, pp.171b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, 2005
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