This paper presents a hardware architecture for Multi Protocol Label Switching (MPLS). MPLS is a protocol used primarily to prioritize internet traffic and improve bandwidth utilization. Furthermore it increases the performance of internet applications and overall efficiency. However, most existing MPLS solutions are entirely software based. MPLS performance can be enhanced by executing core tasks (i.e. label stack modification) in hardware while allowing other tasks to be executed in software to guard against performance degradation. This paper proposes a hardware/software design of MPLS on an FPGA for increased performance and efficiency. Greatest emphasis is placed on the hardware components.