19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 Domain Specific Reconfigurable Architecture of Turbo Decoder Optimized for Short Distance Wireless Communication Denver, Colorado April 04-April 08 ISBN: 0-7695-2312-9
This paper describes low power, reconfigurable architectures for Turbo Decoder. Currently most of the reconfigurable solutions in research target reconfiguration between different convolution based decoders for example Viterbi-Sova or Sova-LogMap. The reconfigurable Turbo decoder array presented in this paper not only provides flexibility to choose between different constraint lengths, frame lengths and code rates but also different levels of quantization. Similarly, dynamic or static mapping of different algorithms can be done to meet various performance constraints in terms of reduced power, improved speed and different levels of error correction. The architecture can support channel decoding for most of the current communication systems.
Index Terms:
Reconfigurable, turbo codes, array, programmable, quantization, Bluetooth, embedded, Domain Specific, lowpower
Citation:
Imran Ahmed, Tughrul Arslan, Sajid Baloch, Ian Underwood, Robin Woodburn, "Domain Specific Reconfigurable Architecture of Turbo Decoder Optimized for Short Distance Wireless Communication," ipdps, vol. 4, pp.166b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||