19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture Denver, Colorado April 04-April 08 ISBN: 0-7695-2312-9
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.17
The most common reconfigurable devices today are Field Programmable Gate Arrays, FPGAs. Aim of this paper is to propose a design methodology for dynamically reconfigurable systems providing a dynamic architecture that, thanks to the processor embedded in the FPGA, is able to dynamically change the design implementation to meet and satisfy all the requirements of the system implementation. The proposed methodology provides a solution for the partial dynamic reconfiguration of an embedded system, using a common FPGA and development board, without any specific or dedicated device. This paper describes the Caronte architecture used to implement the proposed approach, showing how it is possible to obtain a reconfigurable system just using tools that are already widely used to design FPGA-based systems.
Citation:
Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto, "A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture," ipdps, vol. 4, pp.163b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||