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13th IEEE International On-Line Testing Symposium (IOLTS 2007)
A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors
Heraklion, Crete, Greece
July 08-July 11
ISBN: 0-7695-2918-6
Marta Portela-Garcia, Carlos III University of Madrid, Spain
Celia L?pez-Ongil, Carlos III University of Madrid, Spain
Mario Garcia-Valderas, Carlos III University of Madrid, Spain
Luis Entrena, Carlos III University of Madrid, Spain
Processors are very common components in current digital systems and to assess their reliability is an essential task during the design process. In this paper a new fault injection solution to measure SEU sensitivity in processors is presented. It consists in a hardware-implemented module that performs fault injection through the available JTAG-based On-Chip Debugger (OCD). It can be widely applicable to different processors since JTAG standard is an extended interface and OCDs are usually available in current processors. The hardware implementation avoids the communication between the target system and the software debugging tool. The method has been applied to a complex processor, the ARM7TDMI. Results illustrate the approach is a fast, efficient and cost-effective solution.
Citation:
Marta Portela-Garcia, Celia L?pez-Ongil, Mario Garcia-Valderas, Luis Entrena, "A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors," iolts, pp.101-106, 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
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