Memories are the highest volume ICs. With production of 30K wafers/month, i.e., production of NAND Flash memories with 800 chips/wafer, a single fab today produces more than 250M chips per year. In such a high volume manufacturing (HVM) environment, identification of recurring faults, determination and elimination of the root cause in real-time is paramount to un-interrupted operation.

In this presentation, a methodology will be presented that creates a close-loop ATE to EDA. Porting and analyzing tester data into EDA design environment drastically reduces fault identification time and the time to determine the cause of fault. Because diagnosis is performed within the EDA environment, diagnostic results become available at every level of the design hierarchy; thus, engineers can modify the design to eliminate the root cause.