Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems

I
IOLTS
2005
11th IEEE International On-Line Testing Symposium
Abstract - Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems

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11th IEEE International On-Line Testing Symposium

Saint Raphael, French Riviera, France

July 06-July 08

ISBN: 0-7695-2406-0

	ASCII Text	x
	Ishwar Parulkar, Robert Cypher, "Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems," On-Line Testing Symposium, IEEE International, pp. 74-77, 11th IEEE International On-Line Testing Symposium, 2005.

	BibTex	x
	@article{ 10.1109/IOLTS.2005.68, author = {Ishwar Parulkar and Robert Cypher}, title = {Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems}, journal ={On-Line Testing Symposium, IEEE International}, volume = {0}, year = {2005}, issn = {1530-1591}, pages = {74-77}, doi = {http://doi.ieeecomputersociety.org/10.1109/IOLTS.2005.68}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - On-Line Testing Symposium, IEEE International TI - Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems SN - 1530-1591 SP74 EP77 A1 - Ishwar Parulkar, A1 - Robert Cypher, PY - 2005 KW - null VL - 0 JA - On-Line Testing Symposium, IEEE International ER -

Ishwar Parulkar, Sun Microsystems, Inc.

Robert Cypher, Sun Microsystems, Inc.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IOLTS.2005.68

Silicon technology trends of 65nm technology and architectural trends of the next generation of processors, chip-sets and systems are driving new design paradigms and shifts in the approaches towards robust system design. This paper addresses the convergence of these trends in designing the next generation of highly reliable systems at Sun Microsystems.

Citation:

Ishwar Parulkar, Robert Cypher, "Trends and Trade-Offs in Designing Highly Robust Throughput Computing Oriented Chips and Systems," iolts, pp.74-77, 11th IEEE International On-Line Testing Symposium, 2005

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