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11th IEEE International On-Line Testing Symposium
How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight
Saint Raphael, French Riviera, France
July 06-July 08
ISBN: 0-7695-2406-0
R. Velazco, TIMA Laboratory
R. Ecoffet, CNES
F. Faure, TIMA Laboratory

In this paper are first summarized representative examples of anomalies observed in systems operating on-board satellites as the consequence of the effects of radiation on integrated circuit, showing that Single Event Upsets (SEU) are a major concern.

An approach to predict the sensitivity to SEUs of a software application running on a processor-based architecture is then proposed. It is based on fault injection experiments allowing estimating the average rate of program dysfunctions per upset. This error rate, if combined with static cross-section figures obtained from radiation ground testing, provides an estimation of the target program error rate. The efficiency of this two-step approach was demonstrated by results obtained when applying it to various processors.

Citation:
R. Velazco, R. Ecoffet, F. Faure, "How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight," iolts, pp.303-308, 11th IEEE International On-Line Testing Symposium, 2005
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