CMOS PWM VLSI Implementation of Neural Network

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IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 3

Como, Italy

July 24-July 27

ISBN: 0-7695-0619-4

	ASCII Text	x
	Lu Chen, Bingxue Shi, "CMOS PWM VLSI Implementation of Neural Network," Neural Networks, IEEE - INNS - ENNS International Joint Conference on, vol. 3, pp. 3485, IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 3, 2000.

	BibTex	x
	@article{ 10.1109/IJCNN.2000.861355, author = {Lu Chen and Bingxue Shi}, title = {CMOS PWM VLSI Implementation of Neural Network}, journal ={Neural Networks, IEEE - INNS - ENNS International Joint Conference on}, volume = {3}, year = {2000}, issn = {1098-7576}, pages = {3485}, doi = {http://doi.ieeecomputersociety.org/10.1109/IJCNN.2000.861355}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Neural Networks, IEEE - INNS - ENNS International Joint Conference on TI - CMOS PWM VLSI Implementation of Neural Network SN - 1098-7576 SP EP A1 - Lu Chen, A1 - Bingxue Shi, PY - 2000 KW - Neural Network KW - VLSI KW - Pulse Width Modulation VL - 3 JA - Neural Networks, IEEE - INNS - ENNS International Joint Conference on ER -

Lu Chen, Tsinghua University

Bingxue Shi, Tsinghua University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IJCNN.2000.861355

Neural network's VLSI implementation based on Pulse Width Modulation technique is analyzed. A simple synapse multiplier is proposed, which has high precision and large linearity range. A voltage-mode sigmoid circuit with adjustable gain is analyzed, which is used for neuron activation functions. A voltage-pulse conversion circuit required for PWM is suggested, which has high conversion precision and linearity. Based on the above circuits, a PWM VLSI neural network to solve XOR problem is designed. The simulation result shows its correct function and fast speed, it is suitable for VLSI implementation of neural network.

Index Terms:

Neural Network, VLSI, Pulse Width Modulation

Citation:

Lu Chen, Bingxue Shi, "CMOS PWM VLSI Implementation of Neural Network," ijcnn, vol. 3, pp.3485, IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 3, 2000

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