Fourth IEEE International Conference on Computer Vision Systems (ICVS'06) A Real-Time Large Disparity Range Stereo-System using FPGAs New York, New York January 04-January 07 ISBN: 0-7695-2506-7
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVS.2006.6
In this paper, we discuss the design and implementation of a Field-Programmable Gate Array (FPGA) based stereo depth measurement system that is capable of handling a very large disparity range. The system performs rectification of the input video stream and a left-right consistency check to improve the accuracy of the results and generates subpixel disparities at 30 frames/second on 480 ? 640 images. The system is based on the Local Weighted Phase- Correlation algorithm [9] which estimates disparity using a multi-scale and multi-orientation approach. Though FPGAs are ideal devices to exploit the inherent parallelism in many computer vision algorithms, they have a finite resource capacity which poses a challenge when adapting a system to deal with large image sizes or disparity ranges. In this work, we take advantage of the temporal information available in a video sequence to design a novel architecture for the correlation unit to achieve correlation over a large range while keeping the resource utilisation very low as compared to a naive approach of designing a correlation unit in hardware.
Citation:
Divyang K. Masrani, W. James MacLean, "A Real-Time Large Disparity Range Stereo-System using FPGAs," icvs, pp.13, Fourth IEEE International Conference on Computer Vision Systems (ICVS'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||