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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
Energy Efficient Hardware Synthesis of Polynomial Expressions
Kolkata, India
January 03-January 07
ISBN: 0-7695-2264-5
Anup Hosangadi, University of California at Santa Barbara
Farzan Fallah, Fujitsu Labs of America, Inc.
Ryan Kastner, University of California at Santa Barbara
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expressions in hardware consumes a lot of energy and therefore careful optimization of these expressions is important in order to achieve low energy consumption. Unfortunately, current optimization techniques for reducing complexity of expressions such as Common Subexpression Elimination (CSE) cannot do a good optimization. In this paper, we present an algebraic technique to reduce the energy consumption of custom datapath implementation of polynomials by reducing the number of energy intensive operations. Our techniques can handle polynomial expressions of any order and containing any number of variables. Synthesis of a set of benchmark polynomials verified the advantages of our technique in reducing energy consumption, where we observed up to 58% improvement over CSE.
Citation:
Anup Hosangadi, Farzan Fallah, Ryan Kastner, "Energy Efficient Hardware Synthesis of Polynomial Expressions," vlsid, pp.653-658, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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