Computer Aided Test (CAT) Tool for Mixed Signal SOCs

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	Similar Articles Articles by Shibaji Banerjee Articles by Debdeep Mukhopadhyay Articles by Dipanwita Roy Chowdhury

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Shibaji Banerjee, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, "Computer Aided Test (CAT) Tool for Mixed Signal SOCs," VLSI Design, International Conference on, pp. 787-790, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.67, author = {Shibaji Banerjee and Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury}, title = {Computer Aided Test (CAT) Tool for Mixed Signal SOCs}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {787-790}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.67}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Computer Aided Test (CAT) Tool for Mixed Signal SOCs SN - 1063-9667 SP787 EP790 A1 - Shibaji Banerjee, A1 - Debdeep Mukhopadhyay, A1 - Dipanwita Roy Chowdhury, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Shibaji Banerjee, Indian Institute of Technology-Kharagpur

Debdeep Mukhopadhyay, Indian Institute of Technology-Kharagpur

Dipanwita Roy Chowdhury, Indian Institute of Technology-Kharagpur

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.67

This paper introduces a Computer-Aided-Test (CAT) tool for Mixed Signal SOC designs. A new DFT strategy has been developed to make the testing scheme digitally compliant. The final DFT solution is generated through scheduling algorithms. The mixed signal cores have been accessed through specially design mechanisms (switches). Extensive experiments have been performed on Mixed Signal SOC benchmarks built of ISCAS?89 circuits for digital cores and ITC?97 circuits for analog cores. Results show that the CAT tool provides a hardware efficient integrated DFT solution.

Citation:

Shibaji Banerjee, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, "Computer Aided Test (CAT) Tool for Mixed Signal SOCs," vlsid, pp.787-790, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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