ADOPT: An Approach to Activity Based Delay Optimization

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	Similar Articles Articles by Gaurav Arora Articles by Abhishek Sharma Articles by D. Nagchoudhury Articles by M. Balakrishnan

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)

Kolkata, India

January 03-January 07

ISBN: 0-7695-2264-5

	ASCII Text	x
	Gaurav Arora, Abhishek Sharma, D. Nagchoudhury, M. Balakrishnan, "ADOPT: An Approach to Activity Based Delay Optimization," VLSI Design, International Conference on, pp. 411-416, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.43, author = {Gaurav Arora and Abhishek Sharma and D. Nagchoudhury and M. Balakrishnan}, title = {ADOPT: An Approach to Activity Based Delay Optimization}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {411-416}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.43}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - ADOPT: An Approach to Activity Based Delay Optimization SN - 1063-9667 SP411 EP416 A1 - Gaurav Arora, A1 - Abhishek Sharma, A1 - D. Nagchoudhury, A1 - M. Balakrishnan, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Gaurav Arora, Indian Institute of Technology-Delhi

Abhishek Sharma, Indian Institute of Technology-Delhi

D. Nagchoudhury, Indian Institute of Technology-Delhi

M. Balakrishnan, Indian Institute of Technology-Delhi

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.43

The direct result of shrinking devices is not only higher densities but also increased switching activity and thus higher device temperatures. The variation in temperature over the chip area can no longer be ignored during design.

This paper presents a novel technique where selective replacement of gates at the intersection of hotspots and critical path is carried out. This can result in area gain for a specific performance constraint or performance gain for a specific area constraint. The technique has been formulated, implemented using a proposed flow based on our own converters integrated with commercial tools and tested. The results show more than 10% area reduction over the designs using the current practice of worst-case temperature implementations.

Citation:

Gaurav Arora, Abhishek Sharma, D. Nagchoudhury, M. Balakrishnan, "ADOPT: An Approach to Activity Based Delay Optimization," vlsid, pp.411-416, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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