18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05) Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops Kolkata, India January 03-January 07 ISBN: 0-7695-2264-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.153
An approach is presented for identifying structural-faults, using the charge-frequency based built-in-self test (CF-BIST) technique in a phase-locked loop (PLL) circuit, for a standard 0.18 µm CMOS process. This method not only validated the CF-BIST approach for fault detection, but also showed an algorithm for how this approach may possibly be used for fault diagnosis as well, for a wide frequency PLL. The method of fault diagnosis is based on measuring the 8-bit digital values from the voltage-controlled oscillator (VCO)/Divide-by-N counter and performing comparisons between the values for the fault-free and fault-introduced conditions.
Citation:
AdityaSankar Medury, Ingvar Carlson, Atila Alvandpour, John Stensby, "Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops," vlsid, pp.842-845, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||