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17th International Conference on VLSI Design
An Architecture for Motion Estimation in the Transform Domain
Mumbai, India
January 05-January 09
ISBN: 0-7695-2072-3
J. Lee, The Pennsylvania State University
N. Vijaykrishnan, The Pennsylvania State University
M. J. Irwin, The Pennsylvania State University
W. Wolf, Princeton University
In this paper, a novel architecture for transform domain motion estimation is proposed. We derive a recursion equation from the algorithm and wavefront array processors are used to perform motion estimation algorithm adaptively in the transform domain according to the compression ratio. It is also shown that a higher throughput rate with the reduction of arithmetic building blocks, frame memory size and the number of memory accesses is achieved. The proposed architecture can also reconfigure to different algorithms that can be used to perform power-aware video encoding. Simulation results on video sequences of different characteristics show comparable performance of the proposed algorithm to spatial domain approaches in the aspects of PSNR and compression ratio.
Citation:
J. Lee, N. Vijaykrishnan, M. J. Irwin, W. Wolf, "An Architecture for Motion Estimation in the Transform Domain," vlsid, pp.1077, 17th International Conference on VLSI Design, 2004
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