Dynamic Noise Margin: Definitions and Model

V
VLSID
2004
17th International Conference on VLSI Design
Abstract - Dynamic Noise Margin: Definitions and Model

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17th International Conference on VLSI Design

Mumbai, India

January 05-January 09

ISBN: 0-7695-2072-3

	ASCII Text	x
	Li Ding, Pinaki Mazumder, "Dynamic Noise Margin: Definitions and Model," VLSI Design, International Conference on, pp. 1001, 17th International Conference on VLSI Design, 2004.

	BibTex	x
	@article{ 10.1109/ICVD.2004.1261061, author = {Li Ding and Pinaki Mazumder}, title = {Dynamic Noise Margin: Definitions and Model}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2004}, issn = {1063-9667}, pages = {1001}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261061}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Dynamic Noise Margin: Definitions and Model SN - 1063-9667 SP EP A1 - Li Ding, A1 - Pinaki Mazumder, PY - 2004 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Li Ding, The University of Michigan, Ann Arbor

Pinaki Mazumder, The University of Michigan, Ann Arbor

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261061

Dynamic noise analysis is greatly needed in place of traditional static noise analysis due to the ever increasingly stringent design requirement for VLSI chips based on very deep submicron process technology. In this paper, we propose complete and self-consistent dynamic noise margin definitions to reduce the pessimism of conventional static noise margin based noise analysis. A simple and accurate dynamic noise margin model is then developed based on a new figure of merit, which is the ratio between the input noise duration and the sum of gate load capacitance and gate intrinsic capacitance. An efficient dynamic noise margin based noise analysis method is presented.

Citation:

Li Ding, Pinaki Mazumder, "Dynamic Noise Margin: Definitions and Model," vlsid, pp.1001, 17th International Conference on VLSI Design, 2004

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