17th International Conference on VLSI Design A 2.5GHz CMOS Fully-Integrated \Delta\Sigma-Controlled Fractional-N Frequency Synthesizer Mumbai, India January 05-January 09 ISBN: 0-7695-2072-3
The design of a fully-integrated \Delta\Sigma-controlled fractional-N frequency synthesizer is described. Using a dual modulus 64/72 prescalar based on injection locking technique and a novel third order digital \Delta\Sigma modulator, we achieved an extremely low power synthesizer in 2.5GHz band.. Total power dissipation of the frequency synthesizer is less than 6mW at a 1.5V supply. The loop bandwidth is optimized to achieve a -123dBc/Hz phase noise at 3MHz offset frequency. The locking time of the loop is less than 30?s.
Citation:
Rasoul Dehghani, "A 2.5GHz CMOS Fully-Integrated \Delta\Sigma-Controlled Fractional-N Frequency Synthesizer," vlsid, pp.163, 17th International Conference on VLSI Design, 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||