High Level Synthesis from Sim-nML Processor Models

V
VLSID
2003
16th International Conference on VLSI Design
Abstract - High Level Synthesis from Sim-nML Processor Models

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	Similar Articles Articles by Souvik Basu Articles by Rajat Moona

16th International Conference on VLSI Design

New Delhi, India

January 04-January 08

ISBN: 0-7695-1868-0

	ASCII Text	x
	Souvik Basu, Rajat Moona, "High Level Synthesis from Sim-nML Processor Models," VLSI Design, International Conference on, pp. 255, 16th International Conference on VLSI Design, 2003.

	BibTex	x
	@article{ 10.1109/ICVD.2003.1183146, author = {Souvik Basu and Rajat Moona}, title = {High Level Synthesis from Sim-nML Processor Models}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2003}, issn = {1063-9667}, pages = {255}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183146}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - High Level Synthesis from Sim-nML Processor Models SN - 1063-9667 SP EP A1 - Souvik Basu, A1 - Rajat Moona, PY - 2003 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Souvik Basu, GDA Technologies Limited

Rajat Moona, IIT Kanpur,India

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183146

The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML [1] is a specification language to model processors for such designs. Several software generation tools have been developed that take ISA specifications in Sim-nML as input.

In this paper we present a tool Sim-HS that implements high level behavioral and structural synthesis of processors from their ISA specifications in Sim-nML. Behavioral Sim-HS transforms Sim-nML specifications of a processor to the corresponding behavioral Verilog model that is suitable for fast functional simulation. Structural Sim-HS generates structural synthesizable Verilo processor model from its Sim-nML specifications.

Citation:

Souvik Basu, Rajat Moona, "High Level Synthesis from Sim-nML Processor Models," vlsid, pp.255, 16th International Conference on VLSI Design, 2003

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