Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation

V
VLSID
2003
16th International Conference on VLSI Design
Abstract - Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation

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	Similar Articles Articles by Venkatesan Muthukumar Articles by Henry Selvaraj

16th International Conference on VLSI Design

New Delhi, India

January 04-January 08

ISBN: 0-7695-1868-0

	ASCII Text	x
	Venkatesan Muthukumar, Henry Selvaraj, "Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation," VLSI Design, International Conference on, pp. 51, 16th International Conference on VLSI Design, 2003.

	BibTex	x
	@article{ 10.1109/ICVD.2003.1183114, author = {Venkatesan Muthukumar and Henry Selvaraj}, title = {Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2003}, issn = {1063-9667}, pages = {51}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183114}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation SN - 1063-9667 SP EP A1 - Venkatesan Muthukumar, A1 - Henry Selvaraj, PY - 2003 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Venkatesan Muthukumar, University of Nevada Las Vegas

Henry Selvaraj, University of Nevada Las Vegas

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183114

Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound variables (variable partitioning problem) for disjoint (disjoint serial) decomposition, such that the decomposed circuits are smaller in size and its truth table representation have maximal don?t cares. A novel pruned breadth first search (PBFS/IPBFS) approach is proposed to determine the set of good variable partitions with minimal time and computational complexity. The heuristics proposed minimize the size of the sub-functions. The proposed approach has been successfully implemented and test with MCNC and Espresso benchmarks.

Citation:

Venkatesan Muthukumar, Henry Selvaraj, "Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation," vlsid, pp.51, 16th International Conference on VLSI Design, 2003

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