Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits

V
VLSID
2001
The 14th International Conference on VLSI Design (VLSID '01)
Abstract - Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits

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The 14th International Conference on VLSI Design (VLSID '01)

Bangalore, India

January 03-January 07

ISBN: 0-7695-0831-6

	ASCII Text	x
	Dilip Bhavsar, Rishan Tan, "Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits," VLSI Design, International Conference on, pp. 385, The 14th International Conference on VLSI Design (VLSID '01), 2001.

	BibTex	x
	@article{ 10.1109/ICVD.2001.902689, author = {Dilip Bhavsar and Rishan Tan}, title = {Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2001}, issn = {1063-9667}, pages = {385}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2001.902689}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits SN - 1063-9667 SP EP A1 - Dilip Bhavsar, A1 - Rishan Tan, PY - 2001 VL - 0 JA - VLSI Design, International Conference on ER -

Dilip Bhavsar, Compaq Computer Corporation

Rishan Tan, Compaq Computer Corporation

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2001.902689

We present a simple design innovation and a testing methodology that overcomes the known difficulties in using linear feedback shift register based observability registers for failure isolation. The design makes diagnosing failures speedy and efficient during both the initial test development phase and the subsequent production and field failure analysis phase. The design architecture can be easily implemented on VLSI circuits, such as high-performance microprocessors, for enhancing the test effectiveness of at-speed functional tests. We present some results from its deployment on Compaq's Alpha 21264 microprocessor.

Citation:

Dilip Bhavsar, Rishan Tan, "Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits," vlsid, pp.385, The 14th International Conference on VLSI Design (VLSID '01), 2001

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