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The 14th International Conference on VLSI Design (VLSID '01)
A Novel Algorithm for Multi-Node Bridge Analysis of Large VLSI Circuits
Bangalore, India
January 03-January 07
ISBN: 0-7695-0831-6
Sujit T. Zachariah, Intel Corporation
Sreejit Chakravarty, Intel Corporation
Defects that short two or more nodes are known as multi-node bridges. Multinode bridge analysis can be used to extract a list of either only two-node bridges or multi-node bridges. We discuss why multi-node bridge analysis is also required even if only two-node bridges are targeted. We propose a novel, scalable and accurate algorithm for multi-node bridge analysis of large layouts. CARAFE can perform multi-node analysis only on small layouts. Comparison results show that for small layouts our algorithm is considerably faster than CARAFE. For larger layouts experimental results are provided to illustrate the performance and capacity of our algorithm.
Citation:
Sujit T. Zachariah, Sreejit Chakravarty, "A Novel Algorithm for Multi-Node Bridge Analysis of Large VLSI Circuits," vlsid, pp.333, The 14th International Conference on VLSI Design (VLSID '01), 2001
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