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The 14th International Conference on VLSI Design (VLSID '01)
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
Bangalore, India
January 03-January 07
ISBN: 0-7695-0831-6
ASCII Text
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Amit Sinha, Anantha P. Chandrakasan, "Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces," VLSI Design, International Conference on, pp. 221, The 14th International Conference on VLSI Design (VLSID '01), 2001.
 
 
BibTex
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@article{ 10.1109/ICVD.2001.902664,
author = {Amit Sinha and Anantha P. Chandrakasan},
title = {Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2001},
issn = {1063-9667},
pages = {221},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2001.902664},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
SN - 1063-9667
SP
EP
A1 - Amit Sinha,
A1 - Anantha P. Chandrakasan,
PY - 2001
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Amit Sinha, Massachusetts Institute of Technology
Anantha P. Chandrakasan, Massachusetts Institute of Technology
An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency and filtering strategy on the energy savings is analyzed. A performance hit metric is defined and techniques to minimize energy under a given performance requirement are outlined. Our results demonstrate that up to two orders of magnitude energy savings is possible with dynamic voltage scheduling depending on workload statistics.
Citation:
Amit Sinha, Anantha P. Chandrakasan, "Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces," vlsid, pp.221, The 14th International Conference on VLSI Design (VLSID '01), 2001
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