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13th International Conference on VLSI Design
SOI Digital Circuits: Design Issues
Calcutta, India
January 04-January 07
ISBN: 0-7695-0487-6
ASCII Text
x 
 
Ruchir Puri, C.T. Chuang, "SOI Digital Circuits: Design Issues," VLSI Design, International Conference on, pp. 474, 13th International Conference on VLSI Design, 2000.
 
 
BibTex
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@article{ 10.1109/ICVD.2000.812652,
author = {Ruchir Puri and C.T. Chuang},
title = {SOI Digital Circuits: Design Issues},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2000},
issn = {1063-9667},
pages = {474},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2000.812652},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - SOI Digital Circuits: Design Issues
SN - 1063-9667
SP
EP
A1 - Ruchir Puri,
A1 - C.T. Chuang,
PY - 2000
KW - SOI
KW - Digital Circuits
KW - Design
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Ruchir Puri, IBM T. J. Watson Research Center
C.T. Chuang, IBM T. J. Watson Research Center
This paper reviews the recent advances in SOI digital CMOS circuits. Particular emphases is placed on the impact of floating-body in partially-depleted devices on the circuit operation, stability, and functionality. Unique SOI design aspects such as parasitic bipolar effect and hysteretic V_T variation are addressed. Circuit techniques to improve the noise immunity and global design issues are also addressed.
Index Terms:
SOI, Digital Circuits, Design
Citation:
Ruchir Puri, C.T. Chuang, "SOI Digital Circuits: Design Issues," vlsid, pp.474, 13th International Conference on VLSI Design, 2000
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