13th International Conference on VLSI Design Specification and Design of a Quasi-Delay-Insensitive Java Card Microprocessor Calcutta, India January 04-January 07 ISBN: 0-7695-0487-6
This paper proposes a very robust microprocessor for Java Card based on asynchronous technology. Data dependency graphs are used to specify the microoperations of instructions of Java Card and then mapped to our quasi-delay-insensitive components. Three optimization schemes are proposed for better performance, less power consumption and/or less logic. Our goal is to design a simple, robust Java Card microprocessor.
Citation:
Fu-Chiung Cheng, Chuin-Ren Wang, "Specification and Design of a Quasi-Delay-Insensitive Java Card Microprocessor," vlsid, pp.356, 13th International Conference on VLSI Design, 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||