13th International Conference on VLSI Design Cost Trade-Offs in System On Chip Designs Calcutta, India January 04-January 07 ISBN: 0-7695-0487-6
Advances in technology have led to a drive towards System on Chip (SoC) designs. However, manufacturing and test costs have increased as rapidly as design complexity. Hence, in order to produce SoC designs at reasonable cost, both system-level and die-level cost trade-offs must be made. This paper illustrates the methodologies used in analyzing such trade-offs. Examples in the paper indicate that using advanced technologies to manufacture SoC designs may sometimes be detrimental in terms of total system costs.
Index Terms:
System On Chip, Manufacturing Cost, Test Cost, Technology Migration, Cost Trade-Offs
Citation:
J. Khare, H. T. Heineken, M. d'Abreu, "Cost Trade-Offs in System On Chip Designs," vlsid, pp.178, 13th International Conference on VLSI Design, 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||