13th International Conference on VLSI Design
Status Condition Analysis during Data Path Verification of Sequential Circuits
Calcutta, India
January 04-January 07
ISBN: 0-7695-0487-6
A control path data path partition based sequential circuit verification scheme can avoid the state explosion problem. Of the two broad tasks involved in data path verification namely, register transfer operation analysis and status condition analysis, the second one is described. The issues addressed are (i) time expended in status detection and (ii) completeness of the analysis function. A status analyzer, based on a simplifying assumption, has been presented.