As the ability to integrate and pack more devices within a die of silicon increases with each new generation of the fabrication technology, the complexity of digital sys tems realizable on a single chip has also grown by leaps and bounds. It is imperative, from the point of view of eco nomics, to be able to migrate any design from one foundry specific technology to another; as well as, from a present generation fabrication technology to the next generation fabrication technology. The process of porting a layout from one process to the other, there by exploiting the reus ability of the layout resources accumulated from the initial process is called technology migration. We describe the technology migration process with reference to our layout preserving migration tool "TECHMIG" highlighting our innovative constraint generation algorithms for polygonal layout elements which are generally encountered in real life layouts.