12th International Conference on VLSI Design - 'VLSI for the Information Appliance' Empirical Computation of Reject Ratio in VLSI Testing Goa, India January 10-January 13 ISBN: 0-7695-0013-7
Among significant components of testing cost are test-length, reject ratio, and lost-yield. In this paper a new approach is proposed to estimate the reject ratio. The empirical model is based on test-data properties that are believed to be invariant for a wide range of manufacturing technologies and types of tests. The analysis is carried out entirely in terms of the device test data, as might be available from wafer probe. Experimental results demonstrate robustness of the model.
Citation:
Shashank K. Mehta, Sharad C. Seth, "Empirical Computation of Reject Ratio in VLSI Testing," vlsid, pp.506, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||