Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams

V
VLSID
1999
12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Abstract - Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams

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	Similar Articles Articles by Pankaj Chauhan Articles by Pallab Dasgupta Articles by P.P. Chakrabarti

12th International Conference on VLSI Design - 'VLSI for the Information Appliance'

Goa, India

January 10-January 13

ISBN: 0-7695-0013-7

	ASCII Text	x
	Pankaj Chauhan, Pallab Dasgupta, P.P. Chakrabarti, "Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams," VLSI Design, International Conference on, pp. 324, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999.

	BibTex	x
	@article{ 10.1109/ICVD.1999.745173, author = {Pankaj Chauhan and Pallab Dasgupta and P.P. Chakrabarti}, title = {Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {1999}, issn = {1063-9667}, pages = {324}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745173}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams SN - 1063-9667 SP EP A1 - Pankaj Chauhan, A1 - Pallab Dasgupta, A1 - P.P. Chakrabarti, PY - 1999 VL - 0 JA - VLSI Design, International Conference on ER -

Pankaj Chauhan

Pallab Dasgupta

P.P. Chakrabarti

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745173

We present two techniques for compaction of ROBDDs. The first technique extracts isomorphic subtrees from a characteristic function ROBDD (cfBDD), replaces them by multi-output nodes, and stores the extracted subtrees as MTBDDs. The second technique searches signatures ( pre-defined topological structures) within the cfbdd and replaces them by multioutput nodes. While both approaches are able to extract isomporphic subtrees in the cfBDD, the signature scanning approach gives a significantly better compression and reduces the simulation time as compared to cfBDD simulation, which shows that it is possible to compress BDDs and yet simulate them faster.

Citation:

Pankaj Chauhan, Pallab Dasgupta, P.P. Chakrabarti, "Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams," vlsid, pp.324, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999

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