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12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
MPEG-2 Video Data Simulator: A Case Study in Constrained HW-SW Codesign
Goa, India
January 10-January 13
ISBN: 0-7695-0013-7
An MPEG-2 video data simulator has been designed in a constrained design space. A hierarchical FSM model has been developed for MPEG--2 video data simulator. This model can be used for any sequence of moving pictures. This model was verified by behavioral (C-language) simulation for a particular case (colorbars data and I~I~I picture sequence). After an evaluation of the implementation options available in our fairly constrained design space, firmware implementation was selected and implemented.
Citation:
R. Goswami, V. Srinivasan, M. Balakrishnan, "MPEG-2 Video Data Simulator: A Case Study in Constrained HW-SW Codesign," vlsid, pp.128, 12th International Conference on VLSI Design - 'VLSI for the Information Appliance', 1999
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